Conformal copper coating turns the component into its own heat sink

What you will learn:

  • The thermal problem that researchers seek to alleviate.
  • The unusual two-step technique they researched and tested.
  • The multiple implications and results of their approach.

Keeping hot components and especially power supplies within their maximum allowable thermal limits is a pervasive design challenge. Among the many techniques used are top heat sinks, thermal interface pads or diamond films, bottom dissipation via the PCB, heat sinks, heat pipes, etc., coupled with active or passive cooling using the convection, conduction and even radiation.

The challenge increases when other heat sources are nearby: cooling options are highly dependent on the temperature difference between the heat source and the so-called “far” location that this unwanted heat is being transferred to.

Now, a team from the Grainger College of Engineering at the University of Illinois Urbana-Champaign (UIUC), in collaboration with the University of California, Berkeley (UCB), has devised an unconventional scheme that definitely helps ward off these hot components, but with some complications in implementation and use.

Creation of the coating

Their approach first coats the devices with an electrically insulating layer of Parylene C, widely used for conformal coating of fully loaded printed circuit boards to provide protection against moisture and corrosive gases.1,2,3,4 Subsequently, using successive depositions with thermal evaporation, electroless plating and electroplating, a conformal copper coating is monolithically grown on the parylene C (Fig.1).

1. Fabrication of the Cu-coated heat sink: (a) Schematic showing the coating of GaN devices and PCBs with a layer of parylene C for electrical insulation. (b) Diagram of the deposition of a 20 nm thick Cr layer followed by a 50 nm thick Cu layer via PVD. (c) Schematic of electroless Cu deposition to cover shadowed regions under devices and create a continuous Cu film that can conduct electric current from the FR-4 to the top of the device. (d) Schematic showing further Cu growth using dc. Cu electroplating. (e) Calculated thermal resistance RP of parylene C and specific thermal resistance based on measured thickness tP of parylene C. (f) Maximum voltage drop applied across the parylene C layer for different devices tested. Solid green bars and shaded red bars correspond to layers that passed (leakage current 1 µA) to the voltage test, respectively. (g) Cu coating thickness as a function of electroplating time. (Credit: UIUC)

Conformal copper reaches beneath devices to create contact with heat-generating regions, then provides heat dissipation pathways along all surfaces and conductors of the device enclosure. This allows the copper to be close to the heat generating elements, eliminating the need for thermal interface materials and providing improved cooling performance over existing technologies.

Test results

They tested performance using both air and water cooling with two different GaN power transistors: a top-cooled GS66508T surface mount device (SMD) and an EPC2034 ball array device (BGA). cooled from above. (Figs. 2 and 3). The team showed that it can be used in systems operating up to 600 V.

2. Photographs of Tested Configurations (ac), 4.8 cm × 2.5 cm Photographs of 4.8 cm × 2.5 cm Thick Solder Coated Copper Plane Heat Sink: (a) copper clad heat sink and (b,c) pair of 1.4-×1.4×1.4cc Cu heat sinks. The insets show the schematic of the cross-sectional material stack of the solder-coated Cu plane (top left) and the Cu heat sinks (top right). (d) Custom PCBs having two GaN power transistors: a top-cooled SMD from GaN Systems (GS66508T) and a top-cooled BGA device from Efficient Power Conversion (EPC2034). (e) Top view photograph of the 5.4 × 2.5 cm Cu-coated heat sink. (f) To ensure good thermal contact between GaN devices and Cu heat sinks, gap-filling layers were added, followed by thermal paste. (All scale bars correspond to 1 cm.) (Credit: UIUC)

3. Photograph of the experimental setup which includes a PXIe-1073 chassis and TB-4300 module data acquisition (DAQ) system (National Instruments), computer, water reservoir for water experiments at the rest, a printed circuit board (PCB) with its support, a 34461A digital multimeter (DMM) (Agilent), a 6033A dc power supply (HP), and an A655sc camera (FLIR Systems). (Credit: UIUC)

Among their many test results, they found a low junction-ambient specific thermal resistance of 2.3 cm2-K/W in the air at rest and 0.7 cm2-K/W in water at rest (Fig.4).

4. Thermal performance of monolithically copper-integrated EPC2034: (a,b) Thermal resistance (R, left axis) and specific thermal resistance (R″, right axis) as a function of Cu coating thickness ( yous) for (a) the air-cooled GaN EPC2034 device and (b) the water-cooled GaN EPC2034 device. JVS in the insert corresponds to the place of the thermocouple in the network of thermal resistances. JJTamband RJC in the inset correspond respectively to the junction temperature of the device, to the ambient temperature of the fluid and to the junction-to-case thermal resistance of the device. (c,d) Time constant (τ) as a function of Cu coating thickness (ts) for (c) air-cooled EPC2034 GaN device and (d) water-immersion cooled EPC2034 GaN device . (e,f) Temperature variation (ΔT = Ts–Tamb) response as a function of time for the air-cooled GaN EPC2034 device with the Cu heatsink, a 55 μm thick Cu liner, a 172 μm thick Cu liner, and a 476 μm thick Cu liner at a pulsed thermal load of (e) 1.00 Hz and (f) 0.33 Hz. (Credit: UIUC)

Tarek Gebrael, lead author and a UIUC Ph.D. mechanical engineering student, noted the three advantages of this approach: the main material used is copper, which is relatively inexpensive; the copper coating fully “engulfs” the device and covers all exposed surfaces, so no heat-producing regions are overlooked; and no thermal interface material is needed because the device and copper heat sink are essentially one piece, eliminating the need for a heat sink.

Co-author Nenad Miljkovic, Associate Professor of Mechanical Science and Engineering at UIUC and advisor to Gebrael, noted, “This technology bridges two distinct approaches to thermal management: cooling at the devices near the junction and heat propagation at board level.”

Gabrael added, “In our study, we compared our coatings to standard heat dissipation methods, which results in much higher power per unit volume. We were able to demonstrate a 740% increase in power per unit volume.

What’s the verdict?

My opinion is that this impressive statement, while mathematically true, is partly due to careful use of numbers with a much smaller denominator, which is due to the extreme thinness of the copper coating. Interestingly, there are quite a few comments on this document and its claimed benefits, including some very negative to a Ars-Technica forum.5 Additionally, the authors also do not address the practical implications of such an overall conformal conductive coating on product testing, use, or repair, but most products must balance more efficient cooling with these other factors. .

The work is featured in their brief article “High-efficiency cooling through monolithic copper integration on electronic devices” Posted in Natureaccompanied by a 44-page dossier Additional information case. The latter contains extensive procedural details, thermal and mechanical modeling and simulation, result tables and much more.

References

1. Vertical Solutions Inc.,”What is the Parylene coating?

2. University of Michigan LNF Wiki,”Parylene C

3. Specialty Coatings Systems Inc.,”Properties of Parylene SCS

4. Specialty Coatings Systems Inc.,”Parylene deposition process

5. Ars Technica Open Forum. “High-efficiency cooling through monolithic copper integration on electronic devices

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