The need for faster insights opens the door to a new class of testing
What you will learn:
- Why additional PCIe tools are needed to rapidly increase time to market for cutting-edge innovations.
- What tools are currently available to provide solutions to PCIe validation issues among macrotrends?
Less than 20 years after the PCI Express (PCIe) 1.0 specification was introduced by the PCI Special Interest Group, the industry is already gearing up for PCIe Gen 6.0. With each new generation of the standard doubling the data rate of the previous generation, PCIe Gen 6.0 is more than 25 times faster than the original PCIe Gen 1.0 specification introduced in 2003.
This doubling of data rates every three years has posed countless challenges for validation engineers responsible for the physical layer performance of their PHYs, chips, boards, and systems. And not all of them are fully processed by the test equipment available today.
While most of these challenges have been addressed by increasing the performance of key electrical validation equipment such as oscilloscopes and BERTs, these performance improvements have also impacted test complexity in setup and use of equipment. This, in turn, helped increase testing and debugging times for validation teams.
It is a natural progression that the performance of test equipment exceeds that of the standard it aims to validate. However, some of the other challenges faced by engineers are not entirely solved by test equipment performance improvements alone.
Today’s engineers need tools that complement the performance of existing equipment by providing faster access time and superior ease of use, without significantly impacting their project capital budgets. A case for each of these needs can be made by looking at macro industry trends.
Time to Market Challenges: The Case for Faster Time to Market in PCIe Testing
Since the latest PCIe standards must support all previous PCIe generations, the test matrix for each new PCIe generation increases exponentially for validation teams. This, coupled with the complexity of mounting testing as standards advance, has dramatically increased overall test times for programs working to implement the latest PCIe standards. Further complicating the situation is the expectation that these teams will produce next-generation products within a similar time-to-market as previous generations.
Assessing link performance and debugging issues takes longer than ever. Unfortunately, the equipment available today does not support engineers in a way that saves them the days or weeks of debugging and performance evaluation needed to meet these deadlines. There will always be a need for high performance tools like oscilloscopes and BERTs that focus on breaking performance limits, but the industry needs a new tool in the toolkit.
The modern engineer needs a new class of test and measurement equipment that is easier to set up and easier to use. It should also provide faster insights to enable more frequent testing during design and validation to identify issues earlier in the development cycle.
Expected Labor Gap: The Case for Ease of PCIe Testing
As the digital world takes deeper root in everyday life, the demand for semiconductors and solid-state devices continues to grow exponentially. This parabolic growth has notably led to major challenges for the industry in terms of supply chain and logistics.
What is less often discussed, and what may be of most concern, is the projected lack of engineering labor to support growth. According to a presentation by 2022 SEMICON West conference, by 2030 there will be a projected shortfall of about 300,000 engineers needed to support the growth of the semiconductor industry. This shortfall is largely attributed to fewer new college graduates transitioning into the industry and expected attrition from the ranks over the next few years.
This is a significant complication for companies in the industry that is not easily resolved due to the technical nature of developing and validating high-speed I/O (HSIO) devices. PCIe, in particular, is positioned to become increasingly complex as successive generations of standards are released. The lack of manpower to support the development and validation of these devices is expected to put further pressure on program schedules and test workflows for engineering teams across the industry.
To fill this expected labor gap in the industry, companies may be required to allocate engineering tasks more broadly than in the past, creating a need for test equipment that is easier to set up and maintain. use only existing solutions. As this macro trend unfolds, it will become increasingly important to have equipment that requires less training and expertise to operate, while providing meaningful insights into the health and performance of HSIO devices. .
Monetary Review: The Case for Capital Budget Optimization in PCIe
As data rates have increased for later PCIe standards, the demand for higher performance equipment has also increased. The bandwidth requirements needed to support this equipment continue to grow, and with that performance comes a significant cost to acquiring full test suites. These costs are so high that even large companies are often only able to purchase a few complete systems.
Small businesses see an even greater impact. Often, they cannot afford the equipment needed to perform full validation testing and instead must rent or use third-party testing facilities to perform their validation and debugging.
Because performance is paramount to comprehensive PCIe assessment and compliance testing, organizations must absorb significant equipment costs to perform the tests, whether they choose to purchase or lease. While there is no way to avoid this completely, equipment that can deliver meaningful design information earlier and faster without putting significant pressure on program capital budgets will more easily become a welcome fix.
Having equipment that can accelerate testing by increasing the number of test setups and reducing overall test times, without significantly straining program budgets, prepares engineering teams to effectively use the more efficient equipment when needed.
Answering the Call: A New PCIe Test and Measurement Solution
There will always be a need for high performance validation and compliance testing equipment, but equipment that can speed up time to insight, is easy to use and is cost effective will be an essential add-on solution to existing tools. in the test workflow for PCIe today. Through a deep understanding of industry needs, the TMT4 Margin Tester developped by Tektronix is the first and only additional solution on the market to help address key macro trends for PCIe Gen 3 and Gen 4 testing.